QEMU-based Hardware Modelling of a Multi-Hart RISC-V SOC
Emdalo Technologies' Daire McNamara presented his recent work at the 7th RISC-V Workshop in Milpitas, California. Check out his talk below and you can download the slides here.
Emdalo Technologies' Daire McNamara presented his recent work at the 7th RISC-V Workshop in Milpitas, California. Check out his talk below and you can download the slides here.
Emdalo Technologies attended the RE•WORK Deep Learning Summit 2017 in Montreal. There was a high calibre of speakers at this event from both the academia and business worlds. Some of the prevailing themes and concepts included Computer Vision, Convolution Neural Networks, Speech Recognition, and Neural Network Models, Architecture & Frameworks.
This is a guide to compiling the RISC-V C and C++ cross-compiler on Windows 10. The RISC-V cross-compiler supports two build modes: a generic ELF/Newlib toolchain and a more sophisticated Linux-ELF/glibc toolchain.
These instructions concentrate on building the generic ELF/Newlib variant to support both a 32-bit Windows host and a 32-bit RISC-V target.
Emdalo Technologies will be attending the RE•WORK Deep Learning Summit 2016 in London. With over 40 speakers, this two-day event promises to be an exciting insight into the state of the art and current trends within the field of artificial intelligence.