QEMU-based Hardware Modelling of a Multi-Hart RISC-V SOC
Emdalo Technologies' Daire McNamara presented his recent work at the 7th RISC-V Workshop in Milpitas, California. Check out his talk below and you can download the slides here.
This is a guide to compiling the RISC-V C and C++ cross-compiler on Windows 10. The RISC-V cross-compiler supports two build modes: a generic ELF/Newlib toolchain and a more sophisticated Linux-ELF/glibc toolchain.
These instructions concentrate on building the generic ELF/Newlib variant to support both a 32-bit Windows host and a 32-bit RISC-V target.